Ieee Transactions On Semiconductor Manufacturing SCIE

文章名称引用次数

• Wafer Map Defect Pattern Classification and Image Retrieval Using Convolutional Neural Network41
• Classification of Mixed-Type Defect Patterns in Wafer Bin Maps Using Convolutional Neural Networks24
• Hybrid Particle Swarm Optimization Combined With Genetic Operators for Flexible Job-Shop Scheduling Under Uncertain Processing Time for Semiconductor Manufacturing23
• Convolutional Neural Network for Wafer Surface Defect Classification and the Detection of Unknown Defect Class22
• AdaBalGAN: An Improved Generative Adversarial Network With Imbalanced Learning for Wafer Defective Pattern Recognition15
• A Voting Ensemble Classifier for Wafer Map Defect Patterns Identification in Semiconductor Manufacturing15
• Epitaxial beta-Ga2O3 and beta-(AlxGa1-x)(2)O-3/beta-Ga2O3 Heterostructures Growth for Power Electronics15
• Decision Tree Ensemble-Based Wafer Map Failure Pattern Recognition Based on Radon Transform-Based Features13
• A Data Driven Cycle Time Prediction With Feature Selection in a Semiconductor Wafer Fabrication System12
• Deep-Structured Machine Learning Model for the Recognition of Mixed-Defect Patterns in Semiconductor Fabrication Processes12